How can I work at XILINX

Hi @e.b 

Is this the PS DDR or the PL MIG IP?

For Xilinx processing system memory solution using the PS DDR controller the max bandwidth is 2400Mb/s. Please see Table 30 of DS925 on Page 27. So using the -062E memory device derated to -075 speed bin would not be supported and this would be 2666Mb/s and the controller is not spec'd to that speed.

For our PL MIG you can go to 2666Mb/s with our -2 device. Please refer to Table 74 of DS925 on Page 48. So, using this -062E device and derating to -75 speed bin is ok and should work at the highest spec'd speed once all our PCB Guidelines are followed.

And yes the backward compatibility Table 154 does indicate that the -062E device is compatible with -075 speed bin and not the -075E speed bin.



Don’t forget to reply, kudo, and accept as solution.

Kind regards,